Implementation of Ball Grid Array & Other High Density Technology
This document establishes the requirements and interactions necessary for printed board assembly processes for interconnecting high performance/high pin count IC packages. Includes information on design principles, material selection, board fabrication, assembly technology, testing strategy and reliability expectations based on end-use environments. Developed by IPC, EIA, MCNC and Sematech. 96 Pages. Released July 1996. Equivalent to IEC Publicly Available Standard (PAS) 62085
SDO | IPC: Institute for Interconnecting and Packaging Electronic Circuits |
Document Number | J013 |
Publication Date | Not Available |
Language | en - English |
Page Count | |
Revision Level | 0 |
Supercedes | |
Committee |