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IEEE/IEC 61523-1-2023

Current Revision

IEEE/IEC International Standard--Delay and power calculation standards--Part 1: Integrated Circuit (IC) Open Library Architecture (OLA)

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Adoption Standard - Active. Ways for integrated circuit designers to analyze chip timing and power consistently across a broad set of electrical design automation (EDA) applications are covered in this standard. Methods by which integrated circuit vendors can express timing and power information once per given technology are also covered. In addition, the means by which EDA vendors can meet their application performance and capacity needs are discussed.
The scope of this standard focuses on delay and power calculation for integrated circuit design with support for modeling logical behavior and signal integrity.
To improve the IEEE Std 1481TM-1999 system for integrated circuit designers to more accurately and more completely analyze semiconductor designs across EDA applications and for integrated circuit vendors to express logical behavior, signal integrity, delay, and power information only once per technology while enabling sufficient EDA application accuracy.

SDO IEEE: Institute of Electrical and Electronics Engineers
Document Number 61523-1
Publication Date Oct. 18, 2023
Language en - English
Page Count 646
Revision Level
Supercedes
Committee Design Automation
Publish Date Document Id Type View
Oct. 18, 2023 61523-1-2023 Revision