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IEEE 1076.1-1999

Historical Revision

IEEE Standard VHDL Analog and Mixed-Signal Extensions

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New IEEE Standard - Superseded. This standard defines the IEEE 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDL-AMS, is built on IEEE Std 1076-1993 (VHDL) and extends it with additions and changes to provide capabilities of writing and simulating analog and mixed-signal models.
The IEEE 1076 language has been primarily designed for the description and the simulation of digital hardware systems. As such, it provides only limited capabilities when used in analog modeling. VHDL 1076.1 aims to enhance VHDL 1076 such that it can support the description and simulation of circuits and systems that exhibit continuous behavior over time and over amplitude.
To provide a comprehensive mixed-signal description and simulation capabilities as an extension to the IEEE VHDL 1076 language.

SDO IEEE: Institute of Electrical and Electronics Engineers
Document Number 1076.1
Publication Date Dec. 23, 1999
Language en - English
Page Count 314
Revision Level
Supercedes
Committee Design Automation
Publish Date Document Id Type View
Nov. 15, 2007 1076.1-2007 Revision
Dec. 23, 1999 1076.1-1999 Revision