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IEEE 1005-1998

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IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays

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Revision Standard - Inactive-Withdrawn. This standard describes the underlying physics and the operation of floating gate memory arrays, specifically, UV erasable EPROM, byte rewritable E 2 PROMs, and block rewritable flash EEPROMs. In addition, reliability hazards are covered with focus on retention, endurance,and disturb. There are also clauses on the issues of testing floating gate arrays and their hardness to ionizing radiation.
Modify the present FGA standard to include floating gate "flash" EEPROM's that use Fowler-Nordheim tunneling and/or hot electron injection programming techniques. Hot electron injection EPROM's are included for completeness.
Flash EEPROM technology is not currently included in the standard, but is a rapidly growing technology in terms of use. This amendment defines terms used in this technology, explains its operation and limitation. It is intended to assist users in selecting, specifying, using and testing Floating Gate Memory Arrays.

SDO IEEE: Institute of Electrical and Electronics Engineers
Document Number 1005
Publication Date Feb. 9, 1999
Language en - English
Page Count 129
Revision Level
Supercedes
Committee
Publish Date Document Id Type View
Feb. 9, 1999 1005-1998 Revision
Oct. 17, 1991 1005-1991 Revision